Embodiments of the invention relate to field effect transistors such as MOSFET (metal oxide semiconductor field effect transistor) devices and methods for making field effect transistors.
Power MOSFET devices are well known and are used in many applications. Exemplary applications include automotive electronics, portable electronics, power supplies, and telecommunications. One important electrical characteristic of a power MOSFET device is its drain-to-source on-state resistance (RDS(on)), which is defined as the total resistance encountered by a drain current. RDS(on) is proportional to the amount of power consumed while the MOSFET device is on. In a vertical power MOSFET device, this total resistance is composed of several resistive components including an inversion channel resistance (xe2x80x9cchannel resistancexe2x80x9d), a starting substrate resistance, an epitaxial portion resistance and other resistances. The epitaxial portion is typically in the form of a layer and may be referred to as an xe2x80x9cepilayerxe2x80x9d. RDS(on) can be reduced in a MOSFET device by reducing the resistance of one or more of these MOSFET device components.
Reducing RDS(on) is desirable. For example, reducing RDS(on) for a MOSFET device reduces its power consumption and also cuts down on wasteful heat dissipation. The reduction of RDS(on) for a MOSFET device preferably takes place without detrimentally impacting other MOSFET characteristics such as the maximum breakdown voltage (BVDSS) of the device. At the maximum breakdown voltage, a reverse-biased epilayer/well diode in a MOSFET breaks down resulting in significant and uncontrolled current flowing between the source and drain.
It is also desirable to maximize the breakdown voltage for a MOSFET device without increasing RDS(on). The breakdown voltage for a MOSFET device can be increased, for example, by increasing the resistivity of the epilayer or increasing the thickness of the epilayer. However, increasing the epilayer thickness or the epilayer resistivity undesirably increases RDS(on).
It would be desirable to provide for a MOSFET device with a high breakdown voltage and a low RDS(on). Embodiments of the invention address this and other problems.
Embodiments of the invention are directed to MOSFET devices and methods of manufacture. The MOSFET devices have a low RDS(on) and have a high breakdown voltage. For example, with the current state of the art, in embodiments of the invention, RDS(on) for an exemplary 200 V N-channel trench MOSFET can be reduced by 80% as compared to a conventional 200 V N-channel trench MOSFET while maintaining a high breakdown voltage.
One embodiment of the invention is directed to a field effect transistor device comprising: a semiconductor substrate of a first conductivity type having a major surface and a drain region; a well region of a second conductivity type formed in the semiconductor substrate; a source region of the first conductivity type formed in the well region; a trench gate electrode formed adjacent to the source region; and a stripe trench extending from the major surface of the semiconductor substrate into the semiconductor substrate to a predetermined depth. The stripe trench contains a semiconductor material of the second conductivity type to form a PN junction at an interface formed with the semiconductor substrate.
Another embodiment of the invention is directed to a method of forming a field effect transistor device comprising: forming a well region of a second conductivity type in a semiconductor substrate of a first conductivity type, the semiconductor substrate having a major surface and a drain region; forming a source region of the first conductivity type in the well region; forming a trench gate electrode adjacent to the source region; forming a stripe trench extending from the major surface of the semiconductor substrate into the semiconductor substrate to a predetermined depth; and depositing a semiconductor material of the second conductivity type within the stripe trench.
Yet another embodiment of the invention is directed to a method of forming a field effect transistor device comprising: a) forming a well region of a second conductivity type in a semiconductor substrate of a first conductivity type having a major surface and a drain region; b) forming a source region of the first conductivity type formed in the well region; c) forming a gate electrode adjacent to the source region; d) forming a stripe trench extending from the major surface of the semiconductor substrate into the semiconductor substrate to a predetermined depth; and e) depositing a semiconductor material of the second conductivity type within the stripe trench, wherein at least one of steps a), b), and c) occurs after step e).
These and other embodiments of the invention are described in greater detail below with reference to the appended drawings.
FIGS. 1(a) to 1(f) show schematic cross-sectional views of a conventional vertical trench MOSFET device. The figures show vertically expanding depletion regions as increasing reverse bias voltages are applied.
FIGS. 2(a) to 2(f) show schematic cross-sectional views of a vertical trench MOSFET device according to an embodiment of the invention. The figures show horizontally expanding depletion regions as increasing reverse bias voltages are applied.
FIGS. 3(a) to 3(f) show schematic cross sectional views of a vertical trench MOSFET device according to an embodiment of the invention. The figures show horizontally expanding depletion regions as increasing reverse bias voltages are applied.
FIG. 4 is a bar graph illustrating the various resistive components making up RDS(on) in various MOSFET devices with different breakdown voltage ratings.
FIG. 5 is a graph comparing reverse IV curves for conventional trench MOSFET devices with a reverse IV curve for a trench MOSFET device according to an embodiment of the invention.
FIG. 6 is a graph showing reverse IV curves for trench MOSFET devices with different Pxe2x88x92stripe depths. The curves show the effect of varying Pxe2x88x92stripe depths on BVDSS.
FIG. 7 is a graph showing reverse IV curves for trench MOSFET devices with different Pxe2x88x92stripe widths. The curves show the effect of varying Pxe2x88x92stripe widths on BVDSS.
FIGS. 8(a) to 8(d) are cross-sectional views illustrating a method for forming a MOSFET device according to an embodiment of the invention.
FIG. 8(e) shows a cross-sectional view of a MOSFET device with a stripe having a Pxe2x88x92lining and a dielectric inner portion.